This application claims priority to Korean Patent Application No. 2004-74821, filed on Sep. 18, 2004, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates generally to voltage reference generators, and more particularly, to a voltage reference generator with flexible control of the generated voltage.
2. Description of the Related Art
Silicon which may be a conductor or a nonconductor is frequently used for fabricating a semiconductor device. With impurities such as donors or accepters doping silicon, movable electrical charges (i.e. electrons or holes) are generated in the silicon to determine the electrical property of the semiconductor device.
Ion implantation or deposition is used for doping the silicon with such impurities. In addition, electrons and holes are continuously generated and extinguished in the semiconductor device. For example, if the semiconductor absorbs sufficient energy, electron-hole pairs are generated. Such generated electron-hole pairs are subsequently extinguished by recombination after an elapse of time.
Such generation and extinction of the electron-hole pairs result in leakage current of at least several micro-amperes (μA) or more in an integrated circuit. Such leakage current is difficult to eliminate, and the level of such leakage current is difficult to predict. For low power integrated circuits, such leakage current must be considered during the design.
A voltage reference generator is commonly used in integrated circuits for providing a reference voltage that is constant irrespective of a variation in a supply voltage, temperature, or manufacturing process. For example, the voltage reference generator is commonly used in an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC). In particular, as systems are desired to consume low power, the voltage reference generator is also desired to consume low power.
A conventional voltage reference circuit generates a reference voltage from an energy band gap of silicon. However, for low power consumption at low levels of current, leakage current becomes significant compared with the level of current in the voltage reference circuit.
FIG. 1 is a schematic diagram of a conventional voltage reference circuit. The voltage reference circuit of FIG. 1 includes a current source 10 for supplying a reference current Iref and a current sink 20 for generating a reference voltage Vref corresponding to the reference current Iref. The reference voltage Vref generated by the current sink 20 is also determined by physical properties of the current sink 20. In the example of FIG. 1, the current sink 20 is an NMOSFET (N-channel metal oxide semiconductor field effect transistor), and the physical properties of the current sink 20 includes a ratio (W/L) of a gate width (W) to a gate length (L) of the NMOSFET 20, as determined during fabrication of the NMOSFET 20.
FIG. 2 is a schematic diagram of a conventional voltage reference circuit using MOSFETs (metal oxide semiconductor field effect transistors) in weak inversion. Referring to FIG. 2, a voltage reference circuit 200 includes two NMOSFETs N1 and N2 operating in weak inversion to generate a reference voltage VREF that is substantially constant with temperature.
When a resistance R1 is properly adjusted, the two NMOSFETs N1 and N2 operate in weak inversion. The two NMOSFETs N1 and N2 and thus the voltage reference circuit 200 consume considerably less power than the prior art. Since operation of the voltage reference circuit 200 is known to one of ordinary skill in the art, generation of the reference voltage VREF is now described.
Referring to FIG. 2, the reference voltage VREF is expressed as the sum (VR2+VN3). VR2 is the voltage across a resistor R2, and VN3 is a gate to source voltage in an NMOSFET N3.
The voltage VR2 is expressed as the following Equation (1):
                              V          R2                =                                            R              ⁢                                                          ⁢              2                                      R              ⁢                                                          ⁢              1                                ⁢          n          ⁢                                          ⁢                      U            T                    ⁢                                          ⁢                      ln            ⁡                          (              S              )                                                          (        1        )            
Here, R1 and R2 are resistances of the two resistors as illustrated in FIG. 2, and ‘n’ is a sub-threshold swing factor of the NMOSFET N3. UT is a thermal voltage having a value of 26 milli-volts (mV) at ambient temperature. A constant S is determined by the ratio
  (            W      1              L      1        )of a gate width (W1) to a gate length (L1) of the NMOSFET N1 and the ratio
  (            W      2              L      2        )of a gate width (W2) to a gate length (L2) of the NMOSFET N2 as expressed in the following Equation (2):
                                                        W              1                                      L              1                                ⁢                      :                    ⁢                                    W              2                                      L              2                                      =                  S          ⁢                      :                    ⁢          1                                    (        2        )            
In the Equation (1) above, the voltage VR2 across the resistor R2 is proportional to absolute temperature. On the other hand, the gate to source voltage VN3 of the NMOSFET N3 is inversely proportional to absolute temperature. Accordingly, the reference voltage VREF can be controlled to be constant irrespective of temperature by properly adjusting the voltages VR2 and VN3.
The conventional voltage reference circuit 200 may operate with low current and thereby low power dissipation. However, for such low power operation, the resistances R1 and/or R2 may be relatively high such as several kilo-ohms (KΩ) to several mega-ohms (MΩ). However, such a high resistance occupies a large area of an integrated circuit, and the resistance value may be difficult to control.